Analysis of LPTTL, its capabilities and deficiencies when used by itself or in interface with LPDTL

Abstract

The purpose of this memo is to investigate the interface conditions arising from the use of low power transistor-transistor logic (LPTTL) in conjunction with low power diode-transistor logic (LPDTL) and to familiarize the reader with the fundamental characteristics which make transistor-transistor logic (TTL) of any power level unique, demonstrating the inherent performance characteristic limits of low power transistor-transistor logic if applied in conventional logic design.